Freescale Semiconductor /MKW21Z4 /TPM2 /QDCTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as QDCTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)QUADEN 0 (0)TOFDIR 0 (0)QUADIR 0 (0)QUADMODE

TOFDIR=0, QUADMODE=0, QUADIR=0, QUADEN=0

Description

Quadrature Decoder Control and Status

Fields

QUADEN

Enables the quadrature decoder mode

0 (0): Quadrature decoder mode is disabled.

1 (1): Quadrature decoder mode is enabled.

TOFDIR

Indicates if the TOF bit was set on the top or the bottom of counting.

0 (0): TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (zero) to its maximum value (MOD register).

1 (1): TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (zero).

QUADIR

Counter Direction in Quadrature Decode Mode

0 (0): Counter direction is decreasing (counter decrement).

1 (1): Counter direction is increasing (counter increment).

QUADMODE

Quadrature Decoder Mode

0 (0): Phase encoding mode.

1 (1): Count and direction encoding mode.

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